Abstract: In order to effectively suppress the strong nonlinearity of 5G RF power amplifiers, this paper designs and implements a SGMSA digital predistorter based on the FPGA MPSOC platform, and uses a parallel structure to improve bandwidth processing capability and processing speed. The MMSA model and GMP model are implemented on the same architecture and compared with the model in this paper. In terms of hardware resource occupation, the SGMSA resource occupation rate is lower, with a reduction of 1% and 6% in lookup table resources, a reduction of 1% in trigger resources, a reduction of 14% and 46% in computation unit resources, and a reduction of 0.137 W and 0.216 W in total on-chip power consumption, respectively. Using a 100 MHz 5GNR signal, the performance of the SGMSA upper and lower sideband near-channel power ratio is significantly better than the MMSA model and GMP model, as well as other papers with the same power amplifier. This paper implements the SGMSA model circuit on FPGA, proving its good predistortion performance and practical engineering application value.