一种低附加相位噪声的放大器设计

    Design of an Amplifier with Low Additive Phase Noise

    • 摘要: 文中设计了一款低附加相位噪声的达林顿放大器。文中首先介绍了放大器的噪声系数和附加相位噪声的基本概念,然后通过公式推导的方式阐述了两者的关系,最后通过工艺选择、电路优化等方面来降低放大器的附加相位噪声。该放大器采用GaAs异质结双极晶体管(HBT)工艺进行了设计仿真和流片,芯片尺寸为0.6 mm×0.6 mm×0.1 mm。测试结果表明,在电源电压为+5 V条件下,该放大器电流为60 mA,工作频率为0.01 GHz~2.00 GHz,P1 dB为19 dBm,噪声系数为2.7 dB,工作频率100 MHz时的附加相位噪声为-162 dBc/Hz@1 kHz、-170 dBc/Hz@10 kHz、-172 dBc/Hz@100 kHz。

       

      Abstract: This article designs a Darlington amplifier with low additional phase noise. In this paper, the basic concepts of the noise figure and the additional phase noise of the amplifier are first introduced. Secondly, the relationship between the two is explained through the formula derivation. Finally, the additional phase noise of the amplifier is reduced through process selection, circuit optimization, and other aspects. The amplifier was designed, simulated, and fabricated by GaAs Heterojunction bipolar transistor (HBT) technology, with a chip size of 0.6 mm×0.6 mm×0.1 mm. The test results show that under the condition of a power supply voltage of +5 V, The amplifier has a current of 60 mA, operating frequency of 0.01 GHz~2.00 GHz, the P1 dB of 19 dBm, noise figure of 2.7 dB, and the additional phase noise at the operating frequency of 100 MHz is -162 dBc/Hz@1 kHz, -170 dBc/Hz@10 kHz, -172 dBc/Hz@100 kHz.

       

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