Abstract: A wideband frequency-swept source at C band with high frequency resolution and high linear sweep speed is developed based on a hybrid scheme of direct digital frequency synthesis (DDS) and phase locked loop (PLL) techniques. In order to provide the PLL with a low-phase-noise wideband frequency-swept reference signal, ADI's DDS IC AD9914 is chosen in this design. A step recovery diode (SRD)-based high-order multiplier chain combined with a frequency doubler is employed to generate the DDS's clock signal with frequency up to 3400MHz. By configuring the frequency tuning word and digital ramp generator inside the AD9914, a sweeping reference signal with a frequency range of 512.5-987.5MHz is gener- ated, with a frequency resolution as fine as Hertz scale. The C band PLL is designed based on a low noise phase-frequency detector and a wideband VCO. The PLL tracks the DDS's sweeping signal at a high speed and suppresses the spurious signals effectively in a specified wide frequency range. The measured results show that the operating frequency covers 4.1-7.9GHz, the one-way sweep period is 1ms and sweep linearity is 1.58×10-6 when the frequency resolution is configured as 0.38 MHz. The measured phase noise is lower than -114dBc/ Hz@ 10kHz and -119dBc/ Hz@100kHz, and the spurious suppression is better than 69dBc for single frequency signals delivered by the frequency source.