Abstract: A design method which takes the limiter as part of the input matching network of the low noise amplifier is proposed in this paper. The noise figure of the whole circuit can be decreased into the minimum noise figure of the low noise amplifier, instead of adding the limiter′s loss to the noise figure of low noise amplifier, which can dramatically decrease the noise figure of the whole circuit. Based on this, an S-band limiter low-noise amplifier chip is designed and implemented, which attains the properties of ultra low noise figure and high power endurance simultaneously. The test results show that this limiter low noise amplifier chip has the lowest noise figure among all the current products working at the similar frequency band. Within the bandwidth of 2. 7 GHz~ 3. 5 GHz. The noise figure is below 0. 85 dB, the gain is above 29 dB with flatness below ±0. 3 dB, the quiescent current is below 25 mA and the output power at 1 dB is above 8 dBm. The limiter low noise amplifier can endure 50 W input pulse power ( pulse width 250 μs, duty cycle 25%) for 30 minutes. When it recovers to room temperature, the noise figure is barely changed. The size of the chip is 3 450 μm×1 600 μm×100 μm.